BEGIN:VCALENDAR VERSION:2.0 PRODID:-//CERN//INDICO//EN BEGIN:VEVENT SUMMARY:A BURN-IN APPARATUS FOR THE ATLAS TILE CALORIMETER PHASE-II UPGRAD E TRANSFORMER COUPLED BUCK CONVERTERS DTSTART;VALUE=DATE-TIME:20230907T160000Z DTEND;VALUE=DATE-TIME:20230907T162000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-3321@indico.tlabs.ac.za DESCRIPTION:Speakers: Ryan Mckenzie (University Of the Witwatersrand)\nAbs tract \nThe upgrade of the ATLAS hadronic Tile-calorimeter (TileCal) Low Voltage Power Supply \n(LVPS) is a part of the preparation for the High-lu minosity LHC project. This talk serves \nto provide a detailed overvie w of the development of a Burn-in test station for an \nupgraded LVPS component known as a Brick. These Bricks are radiation ha rd \ntransformer-coupled buck converters that function to step-down bulk 200 V Direct \nCurrent (DC) power to the 10 V DC required by the on -detector electronics. To ensure \nthe high reliability of the Bricks\, on ce installed within the TileCal\, a burn-in test station \nhas been desi gned and built. The burn-in station functions to implement a bur n-in \nprocedure on eight Bricks simultaneously. This procedure subjec ts the Bricks to suboptimal operating conditions that function to accelerate their ageing as well as to \nstimulate failure mechani sms. This results in elements of the Brick that would fail \npre maturely within TileCal failing within the burn-in station or to experience \nperformance degradation that can be detected by follow-up te sting effectively screening \nout the non-performative sub-population. The burn-in station is of a fully custom design \nin both its hardware and so ftware. The development of the test station will be explored \nin detail\ , the preliminary burn-in procedure to be employed will be provi ded\, the \npreliminary and final commissioning of the test station will be presented culminating in \nan outlook of the project\n\nhttps://indico. tlabs.ac.za/event/112/contributions/3321/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/3321/ END:VEVENT BEGIN:VEVENT SUMMARY:FELIX Phase II\, the ATLAS readout system for LHC Run 4 DTSTART;VALUE=DATE-TIME:20230907T154000Z DTEND;VALUE=DATE-TIME:20230907T160000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-2815@indico.tlabs.ac.za DESCRIPTION:Speakers: Frans Schreuder (Nikhef)\nThe FELIX system has been introduced as a readout system for ATLAS in LHC Run 3\, for a subset of t he ATLAS subdetectors. An evolved version of FELIX\, dubbed Phase II\, wil l be deployed in Run 4 (2029 – 2032) and will serve all ATLAS subdetecto rs.\nThe FELIX Phase II system will be comprised of about 300 servers\, ea ch equipped with custom PCIe FELIX cards and a 400 GbE network interface. The system will receive detector data at the rate of 1 MHz for a total thr oughput of 4.6 TB/s.\nThe new FELIX PCIe card for Run 4\, called FLX-182\, is equipped with a Xilinx Versal Prime VM1802 FGPA/SoC\, a PCIe Gen4x16 i nterface\, four optical links to relay Timing\, Trigger and Control inform ation\, and 24 optical links that operate up to 25 Gb/s to interact with t he front-end electronics.\nThe FLX-182 runs FELIX firmware which has been redesigned and upgraded to deal with the higher data and trigger rates\, a s well as newly added communication protocols for the subdetectors in ATLA S. The firmware design has passed a preliminary design review in January 2 022. The primary goals of the FELIX firmware are to decode and transfer th e data from the front-ends into the host server memory and to receive and distribute precise timing\, trigger and control information.\nThe software running on the FELIX server will also be upgraded to deal with the increa sed data and trigger rates.\n\nhttps://indico.tlabs.ac.za/event/112/contri butions/2815/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/2815/ END:VEVENT BEGIN:VEVENT SUMMARY:South African contribution status of the Tile Calorimeter Phase-II upgrade off-detector electronics DTSTART;VALUE=DATE-TIME:20230907T150000Z DTEND;VALUE=DATE-TIME:20230907T152000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-3211@indico.tlabs.ac.za DESCRIPTION:Speakers: Mpho Gololo ()\nFour important experiments for the H igh Luminosity Large Hadron Collider (HL-LHC) are currently being upgraded to accommodate an increase in luminosity. These four key experiments incl ude ATLAS (A Toroidal LHC ApparatuS)\, which has been improved to study a broad range of physics. The central hadronic calorimeter is the Tile Calor imeter (TileCal)\, which is part of the ATLAS detector. The readout electr onics system of the ATLAS TileCal must be completely redesigned to accommo date the increased radiation levels and data bandwidth for the HL-LHC. Sou th Africa is contributing 24 % to the Tile Phase-II upgrade off-detector e lectronics. The contribution involves the firmware and software design\; a nd production of Tile GbE Switch and TileCoM. This paper presents the stat us of the South African contribution towards the TileCal Phase-II upgrade off-detector electronics.\n\nhttps://indico.tlabs.ac.za/event/112/contribu tions/3211/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/3211/ END:VEVENT BEGIN:VEVENT SUMMARY:The CMS ECAL upgrade for precision timing measurements at the High -Luminosity LHC DTSTART;VALUE=DATE-TIME:20230907T142000Z DTEND;VALUE=DATE-TIME:20230907T144000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-3218@indico.tlabs.ac.za DESCRIPTION:Speakers: Riccardo Paramatti (CERN)\nThe High Luminosity upgr ade of the LHC (HL-LHC) at CERN will provide unprecedented instantaneous a nd integrated luminosities of around 5 x 10^34 cm-2 s-1 and 3000/fb\, resp ectively. An average of 140 to 200 collisions per bunch-crossing (pileup) is expected. In the barrel region of the Compact Muon Solenoid (CMS) elect romagnetic calorimeter (ECAL)\, the lead tungstate crystals and avalanche photodiodes (APDs) will continue to perform well\, while the entire readou t and trigger electronics will be replaced.\n\nA dual gain trans-impedance amplifier and an ASIC providing two 160 MHz ADC channels\, gain selection \, and data compression will be installed. The noise increase in the APDs\ , due to radiation-induced dark current\, will be mitigated by reducing th e ECAL operating temperature. The trigger primitive formation will be move d off-detector and performed by powerful and flexible FPGA processors.\n\n The upgraded ECAL will greatly improve on the time resolution for photons and electrons with energies above 10 GeV. Together with the introduction o f a new timing detector designed to perform measurements with a resolution of a few tens of picoseconds for minimum ionizing particles\, the CMS det ector will be able to precisely reconstruct the primary interaction vertex even with 140-200 pileup interactions per event.\n\nThe design of the ful l ECAL barrel readout chain and the status of the individual component R&D will be presented and results from recent test beam campaigns at the CERN SPS\, using electron beams with energies of up to 250 GeV\, will be summa rised. In particular\, we will present measurements of the energy and timi ng resolution performance of the latest HL-LHC ECAL readout electronics pr ototypes.\n\nhttps://indico.tlabs.ac.za/event/112/contributions/3218/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/3218/ END:VEVENT BEGIN:VEVENT SUMMARY:The Phase-II Upgrade of the ATLAS Hadronic Tile Calorimeter for th e High Luminosity LHC DTSTART;VALUE=DATE-TIME:20230907T144000Z DTEND;VALUE=DATE-TIME:20230907T150000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-3225@indico.tlabs.ac.za DESCRIPTION:Speakers: Edward Nkadimeng (University of the Witwatersrand)\n Abstract. The Tile Calorimeter (TileCal) is a sampling hadronic calorimete r covering the central region of the ATLAS experiment\, with steel as abso rber and plastic scintillators as active medium. The High-Luminosity phase of LHC\, delivering five times the LHC nominal instantaneous luminosity\, is expected to begin in 2029. TileCal will require new electronics to mee t the requirements of a 1 MHz trigger\, higher ambient radiation\, and to ensure better performance under high pile-up conditions. Both the on- and off-detector TileCal electronics will be replaced during the shutdown of 2 026-2028. PMT signals from every TileCal cell will be digitized and sent d irectly to the back-end electronics\, where the signals are reconstructed\ , stored\, and sent to the first level of trigger at a rate of 40 MHz. Thi s will provide better precision of the calorimeter signals used by the tri gger system and will allow the development of more complex trigger algorit hms. The modular front-end electronics feature radiation- tolerant commerc ial off-the-shelf components and redundant design to minimize single point s of failure. The timing\, control and communication interface with the of f-detector electronics is implemented with modern Field Programmable Gate Arrays (FPGAs) and high speed fibre optic links running up to 9.6 Gb/s. Th e TileCal upgrade program has included extensive RD and test beam studies. A Demonstrator module with reverse compatibility with the existing system was inserted in ATLAS in August 2019 for testing in actual detector condi tions. The ongoing developments for on- and off-detector systems\, togethe r with expected performance characteristics and results of test-beam campa igns with the electronics prototypes will be discussed.\n\nhttps://indico. tlabs.ac.za/event/112/contributions/3225/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/3225/ END:VEVENT BEGIN:VEVENT SUMMARY:The upgrade of the CMS Muon System for the LHC Phase 2 DTSTART;VALUE=DATE-TIME:20230907T152000Z DTEND;VALUE=DATE-TIME:20230907T154000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-2897@indico.tlabs.ac.za DESCRIPTION:Speakers: Gabriella Pugliese ()\nDuring the Phase 2\, the Larg e Hadron Collider (LHC) will increase the instantaneous luminosity to 5-7. 5 x 10^34 cm-2 s-1\, representing a new challenge for the Muon System of t he CMS detector. To cope with the new data-taking conditions and to improv e the present tracking and triggering capabilities\, the muon system will undergo specific upgrades targeting both the electronics and detectors. Th e upgrade of the electronics will involve all legacy systems\, based on Dr ift Tubes (DT) and Resistive Plate Chambers (RPC)\, in the barrel region\, and Cathode Strip Chambers (CSC) and RPC in the endcap region. In order t o restore the Muon System redundancy in the high eta region and further ex tend the coverage up to |η| ~2.8\, new stations based on triple Gas Elect ron Multiplier (GEM) and Improved RPC (iRPC) will be installed. During the second long shutdown LS2 (2019-2021)\, the first GEM station and few GEM and iRPC demo-chambers were installed. Moreover\, some prototypes of the n ew On Board electronics for DT(OBDT) were installed in the CMS slice-test demonstrators. In this presentation\, we report the status of the Muon Upg rade project\, including the performance results of the already installed systems with the Run-3 data. The status of the production and validation t ests of the new detectors that will be installed before LS3 and of the new electronics boards to be installed during LS3 will be also reported.\n\nh ttps://indico.tlabs.ac.za/event/112/contributions/2897/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/2897/ END:VEVENT BEGIN:VEVENT SUMMARY:Development of the ATLAS Liquid Argon Calorimeter Readout Elect ronics for the HL-LHC DTSTART;VALUE=DATE-TIME:20230907T140000Z DTEND;VALUE=DATE-TIME:20230907T142000Z DTSTAMP;VALUE=DATE-TIME:20260606T132228Z UID:indico-contribution-535-3197@indico.tlabs.ac.za DESCRIPTION:Speakers: Arno Straessner (Technische Universität Dresden)\nA new era of hadron collisions will start around 2029 with the\n High-Lum inosity LHC which will allow to collect ten times more data\n than what has been collected during 10 years of operation at LHC.\n This will be a chieved by higher instantaneous luminosity at the\n price of a higher nu mber of collisions per bunch crossing.\n\n In order to withstand the hig h expected radiation doses and the harsher\n data taking conditions\, th e ATLAS Liquid Argon Calorimeter readout\n electronics will be upgraded. \n\n The electronic readout chain is composed of four main components.\n 1: New front-end boards will allow to amplify\, shape and digitise the\ n calorimeter’s ionisation signal on two gains over a dynamic range of\n 16 bits and 11 bit precision. Low noise below Minimum Ionising\ n Particle (MIP)\, i.e. below 120 nA for 45 ns peaking time\, and max imum\n non-linearity of two per mille is required. Custom preamplifie rs and\n shapers are being developed to meet these requirements using 65 nm and\n 130 nm CMOS technologies. They shall be stable under irr adiation until\n 1.4kGy (TID) and 4.1x10^13 new/cm^2 (NIEL). Two conc urrent preamp-shaper\n ASICs were developed and\, “ALFE”\, the be st one has been chosen. The test\n results of the latest version of t his ASIC will be presented. “COLUTA”\,\n a new ADC chip is also b eing designed. A production test setup is being\n prepared and integr ation tests of the different components (including\n lpGBT links deve loped by CERN) on a 32-channels front-end board are\n ongoing\, and r esults of this integration will be shown.\n 2: New calibration boards wi ll allow the precise calibration of all\n 182468 channels of the calo rimeter over a 16 bits dynamic range. A\n non-linearity of one per mi lle and non-uniformity between channels of\n 0.25% with a pulse rise time smaller than 1ns shall be achieved. In\n addition\, the custom c alibration ASICs shall be stable under\n irradiation with same levels as preamp-shaper and ADC chips. The HV\n SOI CMOS XFAB 180nm technol ogy is used for the pulser ASIC\, “CLAROC”\,\n while the TSMC 130 nm technology is used for the DAC part\, “LADOC”.\n The latest v ersions of those 2 ASICs which recently passed the production\n readi ness review (PDR) with their respective performances will be presented.\n 3: New ATCA compliant signal processing boards (“LASP”) will receive \n the detector data at 40 MHz where FPGAs connected through lpGBT\n high-speed links will perform energy and time reconstruction. In\n total\, the off-detector electronics receive 345 Tbps of data via 33000 \n links at 10 Gbps. For the first time\, online machine learning tec hniques\n are considered to be used in these FPGAs. A subset of the o riginal data\n is sent with low latency to the hardware trigger syste m\, while the\n full data are buffered until the reception of trigger accept signals. The\n latest development status of the board as well as the firmware will\n be shown.\n 4: A new timing and control sys tem\, “LATS”\, will synchronise with the\n aforementioned compone nts. Its current design status will also be\n shown.\n\nhttps://indic o.tlabs.ac.za/event/112/contributions/3197/ LOCATION: Meeting Room 2.44 - 2.46 URL:https://indico.tlabs.ac.za/event/112/contributions/3197/ END:VEVENT END:VCALENDAR