4-8 September 2023
Africa/Johannesburg timezone
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Electronics design and testing of the CMS Fast Beam Condition Monitor for HL-LHC

7 Sep 2023, 11:00
20m
Meeting Room 2.61 - 2.63

Meeting Room 2.61 - 2.63

Oral Presentations F4

Speaker

Mr Konstantin Shibin (TalTech)

Description

The high-luminosity upgrade of the LHC (HL-LHC) brings unprecedented requirements for precision bunch-by-bunch online luminosity measurement and beam-induced background monitoring with 1 second time granularity, creating the need for new high-precision instrumentation at CMS. A key component of the CMS Beam Radiation Instrumentation and Luminosity system is a stand-alone luminometer, the Fast Beam Condition Monitor (FBCM), which is fully independent from the CMS central trigger and data acquisition services and able to operate at all times with an asynchronous readout. FBCM utilizes a dedicated front-end ASIC to amplify the signals from CO2-cooled silicon-pad sensors with a few nanoseconds timing resolution also enabling the measurement of beam-induced background. Front-end (FE) electronics are subject to high radiation conditions with an expected 1 MeV neutron equivalent fluence of about 2.5e15 at the sensor location, thus all components are radiation hardened: sensors, ASICs, high-speed optical transceivers and voltage regulators. FBCM uses a modular design with two half-disks of twelve modules at each end of CMS, with 4 service modules placed around the disk edge at a radius of reduced radiation fluence. The electronics system design adapts several components from the CMS Tracker for power, control and read out functionalities. The dedicated FBCM ASIC contains 6 channels with 600e- ENC and adjustable shaping time to optimize the noise with regards to sensor leakage current. Each channel outputs a single binary high-speed asynchronous signal carrying the Time-of-Arrival and Time-over-Threshold information. The chip output signal is sent via a radiation-hard gigabit transceiver and an optical link to the back-end electronics for analysis. The ASIC has slow control for internal testability features, calibration and configuration registers access. A dedicated test system is designed for the FBCM FE electronics, it provides a modular and flexible setup for all testing needs throughout the project stages: initial ASIC validation test, irradiated sensor and ASIC tests and system level testing with the full read-out chain. The paper reports on the design, readout architecture and testing program for the FBCM electronics.

Primary authors

Presentation Materials