Speaker
Description
HEPS-BPIX40 is a new hybrid pixel detector specifically designed for the High Energy Photon Source, which is currently under construction in Beijing, China. It is a full upgrade from both the chip and detector module of its former version, BPIX20. The pixel chip comprises a matrix of 128 x 96 pixels, with each pixel measuring 140 μm x 140 μm. The pixel circuit operates in the single photon counting mode with dual thresholds, featuring programmable gains for different beam energies and deadtimeless readout. The counting depth for each threshold is designed to be 14 bits, and the frame rate was tested to be 2 kHz when operating in continuous readout mode. The chip was designed using CMOS 130 nm technology and fabricated by 12-inch wafers, with a yield of 97% tested by a dedicated probe card. Assembled by 2 x 6 chips, a detector module covers an area of 3.7 cm x 8.1 cm. The periphery circuit of the chip was optimized along its height, allowing the assembly gap between multiple modules to be as small as 3 mm, even with conventional wire-bonding processes. All chips of the module were bump bonded by the CuSn process with high yield. The noise after packaging was tested to be about 112e-, and the equalized non-uniformity was found to be 123e-. The full system will consist of 40 modules to implement a detector with approximately six million pixels. This paper presents a detailed design and test results of the detector.
